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> LTE  > IP > LTE-UE

       
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▪ Coverage
- Specification : 3GPP LTE Release 9 (FDD and TDD)
- Category-3 UE (DL: 100Mbps, UL: 50Mbps)
- Antenna Config.: 2 Rx / 1 Tx
- Measurements on serving and other cells
- Hardware-MAC with UEA and UIA (specialized DMA for MAC/RLC/PDCP)
▪ Performance
- Meet the requirements of LTE specifications (TS 36.101) with about 1~3 dB margin
- Below 0.2 dB implementation loss compared to floating point simulator
▪ Compactness

- Fitted in single FPGA with external memory (about 70% occupied on Xilinx V6-550T or Altera S4-530)
- About 10,000,000 ASIC gates (excluding HARQ/L2 memories)
- APB is sufficient to control MODEM thanks to Hardware-MAC
▪ Completeness
- Fitted in Altera and Xilinx FPGA
- Only Memory Conversions remained for the migration to ASIC
- Ready to be armed in Baseband Processor for LTE
▪ Details on UE IP
- Easy to Upgrade
# Arithmetic blocks in a type of stand-alone module for eNB and UE
# Ready for going to ASIC
# Mainly using single port RAM for ASIC (much smaller than dual-port RAM)
# Floating and fixed point simulators identical to HW
# Hardware test platform for real-time verification of functionality and performances

 

- Hardware MAC and some engines to lessen S/W load
# Hardware implementation of Ciphering and Parameter-calculating engines
# Hardware MAC processing payload data in TS 36.321/TS 36.322/TS 36.323
# ARM9 is sufficient for processing L2/L3 protocol stack

- Turbo Decoder
# 16/8/4 parallel decoders with overlapping
# Wide dynamic range for LLR (10 bits)
# Below 0.1 dB implementation loss


- MIMO Detector
# Adopting ML or MMSE-SIC detection algorithms with SIC
# Adopting floating point scheme for wide dynamic range
# Very compact implementation without any performance loss