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ATSC3.0
   
ATSC3.0 Platform

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CL Platform V3.2 Specification
- 1Gbit DDR memory x2.
- 36Mbit Dual port SRAM x1.
- FPGA chip approaching 10,000,000-gates x2.
- FPGA UART monitoring x2
- CleverSYNCModule.
 OCXO 10MHz reference clock Output x2.
 Navsync GPS Receiver module.
- CleverACE Module.
 High speed FPGA configuration support.
 USB 2.0 HS 480MHz port.
- CleverMPC1 Module.
 Dual core 1.2GHz.
 Embedded Freescale P2020 CPU.
 1GBytes DDR3/ SD card booting.
 PCIe Gen1.0 lane x1
 Giga Ethernet x1.
 Debug UART, RS232 Control.
- DIF(Digital intermediate frequency) Module.
 IF 44MHz frequency.
 DAC :16-Bit, 1GHz sampling rate.
 ADC :14-Bit,125MHz sampling rate.
 2 Antenna support.